Search results

As microelectronics continue to shrink, it is becoming increasingly difficult and expensive to mechanically drill very small via holes (<0·010 in.). Using lasers and optical technology, it is possible to drill any material. Thin circuit board materials of various compositions were investigated as candidates for laser drilling using a 100 watt CO2 laser. Laser variables were pulse frequency, duty cycle, and number of pulses (total energy delivered). Delivered energy seems to be the most critical parameter, and the optimal holes were drilled within a narrow energy band, although there was much data scatter. The best laser drilled holes were of lower quality than that obtainable with mechanical drilling. Photographs of the best holes in all materials are included.

NOTWITHSTANDING the fact that there exists a considerable amount of literature published in various forms on the subject of brittle lacquers and their applications to a multitude of diverse problems a brief resume of some of the general principles involved would seem not to be out of place.

This paper reports on thermal strain analysis of integrated circuit (IC) packages using the optical, atomic force microscope (AFM), and scanning electron microscope (SEM) Moiré methods. The advantages and disadvantages of a full field optical Moiré, a micro‐optical Moiré, AFM Moiré, and SEM Moiré methods are compared. The full field Moiré interferometry is used to investigate the deformations and strains induced by thermal loading in various packages at the macrolevel. The micro Moiré interferometry is used to study the strains in the small solder joints. An optical Moiré interferometer with a mini thermal‐cycling chamber can be used for real time measurements of thermal deformations and strains of IC packages under thermal testing. Furthermore, the novel methods, AFM Moiré and SEM Moiré, can be also utilized to measure thermally induced deformations and strains of IC packages conveniently using the equipment that is commonly and primarily used for many other applications.

This paper reports on a study of the scanning electron microscope (SEM) Moiré method. Tests were carried out by rotating the specimen grating slightly with respect to the electron scanning raster lines, to verify that the Moiré images captured were really due to the interference between specimen and reference gratings. The experimental results coincided well with the calculated theoretical values and with small measurement errors. Then, the shear strains experienced by the solder joints of a flip‐chip ball grid array specimen were investigated using the SEM Moiré method. The results were compared with those obtained using the optical Moiré method.

Hybrid methods, wherefore numerical and experimental data are used to calculate a critical parameter, have been used for several years with great success in Experimental Mechanics and, in particular, in fracture mechanics. The purpose of this paper is to report on the comparison of the strain field from numerical modelling forecasts against the experimental data obtained with the digital image correlation method under Mode II loading in fatigue testing. The numerical dual boundary element method has been established in the past as a very reliable method near singular regions where stresses tend to grow abruptly. The results obtained from the strain data near the crack tip were used in Williams expansion and agree fairly well with both the numerical results and the analytical solution proposed for pure Mode II testing.

The work presented in this note is experimental. The proposed methodology is of an hybrid experimental/numerical nature in that a numerical stress intensity factor calculation hinges upon a stress field obtained with an image method.

The obtained results are an important step towards the development of a practical tool for crack behaviour prediction in fatigue dominated events.

The results also stress the necessity of improving the experimental techniques to a point where the methods can be applied in real-life solicitations outside of laboratory premises.

Although several research teams around the globe are presently working in this field, the present research topic is original and the proposed methodology has been presented initially by the research team years ago.

THE public demonstration of the SRN‐I Hovercraft has aroused great interest. Without entering into sterile argument as to whether or not it is an aircraft we propose to give a few details of it and its origins and future.

This work focused on a basic building block of an allocation unit that carries out the critical job of deciding between the conflicting requests, i.e. an arbiter unit. The purpose of this work is to implement an improved hybrid arbiter while harnessing the basic advantages of a matrix arbiter.

The basic approach of the design methodology involves the extraction of traffic information from buffer signals of each port. As the traffic arrives in the buffer of respective ports, information from these buffers acts as a source of differentiation between the ports receiving low traffic rates and ports receiving high traffic rates. A logic circuit is devised that enables an arbiter to dynamically assign priorities to different ports based on the information from buffers. For implementation and verification of the proposed design, a two-stage approach was used. Stage I comprises comparing the proposed arbiter with other arbiters in the literature using Vivado integrated design environment platform. Stage II demonstrates the implementation of the proposed design in Cadence design environment for application-specific integrated chip level implementation. By using such a strategy, this study aims to have a special focus on the feasibility of the design for very large-scale integration implementation.

According to the simulation results, the proposed hybrid arbiter maintains the advantage of a basic matrix arbiter and also possesses the additional feature of fault-tolerant traffic awareness. These features for a hybrid arbiter are achieved with a 19% increase in throughput, a 1.5% decrease in delay and a 19% area increase in comparison to a conventional matrix arbiter.

This paper proposes a traffic-aware mechanism that increases the throughput of an arbiter unit with some area trade-off. The key feature of this hybrid arbiter is that it can assign priorities to the requesting ports based upon the real-time traffic requirements of each port. As a result of this, the arbiter is dynamically able to make arbitration decisions. Now because buffer information is valuable in winning the priority, the presence of a fault-tolerant policy ensures that none of the priority is assigned falsely to a requesting port. By this, wastage of arbitration cycles is avoided and an increase in throughput is also achieved.

The small area network for data communication within routers is suffering from storage of packet, throughput, latency and power consumption. There are a lot of solutions to increase speed of commutation and optimization of power consumption; one among them is Network-on-chip (NoC). In the literature, there are several NoCs which can reconfigurable dynamically and can easily test and validate the results on FPGA. But still, NoCs have limitations which are regarding chip area, reconfigurable time and throughput.

To address these limitations, this research proposes the dynamically buffered and bufferless reconfigurable NoC (DB2R NoC) using X-Y algorithm for routing, Torus for switching and Flexible Direction Order (FDOR) for direction finding between source and destination nodes. Thus, the 3 × 3 and 4 × 4 DB2R NoCs are made free from deadlock, low power and latency and high throughput. To prove the applicability and performance analysis of DB2R NoC for 3 × 3 and 4 × 4 routers on FPGA, the 22 bits for buffered and 19 bit for bufferless designs have been successfully synthesized using Verilog HDL and implemented on Artix-7 FPGA development bond. The virtual input/output chips cope pro tool has been incorporated in the design to verify and debug the complete design on Artix-7 FPGA.

In the obtained result, it has been found that 35% improvement in throughput, 23% improvement in latency and 47% optimization in area has been made. The complete design has been tested for 28 packets of injection rate 0.01; the packets have been generated by using NLFSR.

In the obtained result, it has been found that 35% improvement in throughput, 23% improvement in latency and 47% optimization in area has been made. The complete design has been tested for 28 packets of injection rate 0.01; the packets have been generated by using NLFSR.

This paper presents a routing method for two dimensional transputer arrays particularly designed for parallel non‐linear and dynamic finite element analysis. Some general routing strategies with their strengths and weaknesses are discussed. The need for problem specific routing algorithms in transputer systems is considered and the communication requirements for parallel finite element analysis described. From the communication requirements the design parameters for the routing method are specified and the architectural design of the Router presented. An example of the use of the Router in the parallel non‐linear finite element analysis is given and the robustness of the routing methodology is illustrated by using arbitrary mappings of finite element subdomains distributed over a transputer array.

The purpose of this paper is to develop a methodology for in situ stress intensity factor (SIF) determination that can be used for the analysis of cracked structures. The technique is based on digital image correlation (DIC) combined with an overdetermined algorithm.

The linear overdeterministic algorithm for calculating the SIF based on stress values around the crack tip is applied to a strain field obtained by DIC.

As long as the image quality is sufficiently high, a good accuracy can be obtained for the measured SIF. The crack tip can be automatically detected based on the same strain field. The use of the strain field instead of the displacement field, eliminates problems related to the rigid body motion of the analysed structure.

In future works, based on the applied techniques, the SIF of complex cracked plane stress structures can be accurately determined in real engineering applications.

The paper demonstrates application of known techniques, refined for other applications, also the use of stress field for SIF overdeterministic calculations.